1. Field of the Invention
The present invention relates to a semiconductor chip for flip chip bonding, a mounting structure of the semiconductor chip, and methods for forming the semiconductor chip and printed circuit board for mounting structure of the semiconductor chip.
2. Description of the Related Art
With the development of the semiconductor industry and the pressing demand of users for high integration density and high speed, semiconductor devices are moving in the direction of an increasing number of input/output pins with miniaturization of size. The resulting semiconductor packages range from insert mount type to surface mount type and may be configured as ball grid array packages and chip scale packages, for example.
Wire bonding techniques for interconnection of components on semiconductor devices include tape automated bonding (TAB) and flip chip bonding techniques. The flip chip bonding technique is generally superior to other interconnection techniques in terms of speed, integration density and miniaturization. The flip chip bonding technique has been employed in the manufacture of semiconductor chip packages.
FIG. 1 is a partial cross-sectional view of a conventional semiconductor chip for flip chip bonding. Referring to FIG. 1, a semiconductor chip 100 used in flip chip bonding typically has a bump of conductive material, such as a ball type solder bump 110, for example. A semiconductor substrate 101 includes an electrode pad 102 of Al or Cu for external electrical connection. A passivation layer 103 is formed on the substrate 101 such that a portion of the electrode pad 102 is exposed. The solder bump 110 is formed on the exposed electrode pad 102 and is connected to the electrode pad 102. A multi-layered under barrier metallurgy (UBM) 109 is formed between the solder bump 110 and the electrode pad 102.
The UBM 109 includes a barrier metal layer 107 formed on the exposed electrode pad 102 and a solder wetting layer 108 formed on the barrier metal layer 107. The barrier metal layer 107 may prevent solder material of the solder bump 110 from permeating into the electrode pad 102 and/or the semiconductor substrate 101. The solder wetting layer 108 may assist connection of the solder bump 110.
FIG. 2 is a partial cross-sectional view of the conventional semiconductor chip for flip chip bonding, as mounted on a printed circuit board. Referring to FIG. 2, a substrate 131 of a printed circuit board (PCB) 130 has a substrate contact pad 132. The solder bump 110 is electrically and physically connected to the substrate contact pad 132. An underfill resin (not shown) fills an area between the semiconductor chip 100 and the PCB 130 to protect the connected portion from the external environment, thereby improving the reliability of the interconnection.
The conventional semiconductor chip for flip chip bonding of FIG. 1 and mounting structure of FIG. 2 makes it difficult to achieve adequate chip miniaturization. For example, chip miniaturization requires reduced bump size and thus a reduced distance between the semiconductor chip 100 and PCB 130. However, the conventional art cannot efficiently perform an underfill process to fill the area between the semiconductor chip 100 and the PCB 130 due to the particle size of the underfill material.
In order to solve the problem, an underfill material having a reduced size than what is conventionally used is desired. Practically, however, the development of such an underfill material may result in a rise in cost. Further, the reduced bump size may result in a reduced area of connected portion(s), potentially reducing connection reliability.